features n -80/-85dbc 2nd/3rd hd at 20mhz n -3db bandwidth of 170mhz n 0.1% settling in 22ns n complete overdrive protection n 2400v/ s slew rate n 3m input resistance n output may be current limited n direct replacement for clc207 applications n fast, precision a/d conversion n automatic test equipment n input/output amplifiers n photodiode, ccd preamps n high-speed modems, radios n line drivers general description the kh207 is a wideband, low distortion operational amplifier designed specifically for applications requiringboth high speed and wide dynamic range. utilizing a proprietary current feedback architecture, the kh207 offers performance far superior to that of conventional voltage feedback op amps. the most attractive feature of the kh207 is its extremely low distortion: -80/-85dbc 2nd/3rd harmonicsat 20mhz (2v pp , r l = 200 ). the kh207 also provides -3db bandwidth of 170mhz at a gain of +20, settles to0.1% in 22ns and slews at a rate of 2400v/ s. the combination of these features positions the kh207 asthe right choice for high speed applications requiring exceptional signal purity. high speed, high resolution a/d and d/a converter systems requiring low distortion operation will findthe kh207 an excellent choice. wide dynamic range systems such as radar and communication receivers will find that the kh207s low harmonic distortion and low noise make it an attractive high speed solution. the addition of the kh207 to the kh205/206 series of high speed operational amplifiers broadens theselection of features available from which to choose. the kh205 offers low power operation, the kh206 offers higher drive operation, and the kh207 offers operation with extremely low distortion, all of which are pin compatible and overdrive protected. the kh207 is constructed using thin film resistor/bipolar transistor technology, and is available in the following versions: kh207ai -25 to +85? 12-pin to-8 can kh207ak -55 to +125? 12-pin to-8 can, features burn-in & hermetic testing kh207am -55 to +125? 12-pin to-8 can, environmentallyscreened and electrically tested to mil-std-883 kh207hxc -55 to +125? smd#: 5962-9097701hxc kh207hxa -55 to +125? smd#: 5962-9097701hxa kh207 low distortion wideband op amp rev. 1a january 2004 typical performance gain setting parameter +7 +20 +50 -1 -20 -50 units -3db bandwidth 220 170 80 220 130 80 mhz rise time 1.7 2.2 4.7 1.7 2.9 4.7 ns slew rate 2.4 2.4 2.4 2.4 2.4 2.4 v/ns settling time (to 0.1%) 22 22 20 21 20 19 ns supply voltage 2000 8 r f 7 gnd 9 -v cc 2 nc 3 gnd 1 +v cc 6 v+ 5 v- 4 nc 10 -v cc v o +v cc 11 12 6 6 collector supply output collector supply supply voltage internal feedback not connected case ground non-inverting input inverting input not connected case and bias ground + - bottom view pin 8 provides access to a 2000 feed- back resistor which can be connected to the output or left open if an external feed-back resistor is desired. www.cadeka.com
data sheet kh207 2 rev. 1a january 2004 parameters conditions typ min & max ratings units sym ambient temperature kh207ai +25 -25 +25 +85c ambient temperature kh207ak/am/hxc/hxa +25 -55 +25 +125 frequency domain response = -3db bandwidth v o <2v pp 170 >140 >140 >125 mhz ssbw large-signal bandwidth v o <10v pp 100 >72 >80 >80 mhz fpbw gain flatness v o <2v pp = peaking 0.1 to 35mhz 0 <0.3 <0.3 <0.5 db gfpl = peaking >35mhz 0 <0.8 <0.5 <0.8 db gfph = rolloff at 70mhz C <0.8 <0.8 <0.8 db gfr group delay to 70mhz 3.0 .2 C C C ns gd linear phase deviation to 50mhz 0.8 <3.0 <2.0 <3.0 lpd time domain response rise and fall time 2v step 2.2 <2.6 <2.6 <3.0 ns trs 10v step 4.8 <5.5 <5.5 <5.5 ns trl settling time to 0.1% 10v step, note 2 22 <27 <27 <27 ns ts to 0.05% 10v step, note 2 24 <30 <30 <30 ns tsp overshoot 5v step 7 <14 <14 <14 % os slew rate 20v pp at 50mhz 2.4 >1.8 >2.0 >2.0 v/ns sr noise and distortion response = 2nd harmonic distortion = 2v pp , 20mhz, r l = 200 -80 <-68 <-76 <-76 dbc hd2 2v pp , 20mhz, r l = 100 -69 <-64 <-64 <-64 dbc hd2 = 3rd harmonic distortion = 2v pp , 20mhz, r l = 200 -85 <-76 <-76 <-76 dbc hd3 2v pp , 20mhz, r l = 100 -69 <-64 <-64 <-64 dbc hd3 equivalent input noise voltage >100khz 1.6 <1.8 <1.8 <1.8 nv/ hz vn inverting current >100khz 20 <23 <23 <23 pa/ hz icn non-inverting current >100khz 2.2 <2.5 <2.5 <2.5 pa/ hz ncn noise floor >100khz -158 <-157 <-157 <-157 dbm(1hz) snf integrated noise 1khz to 150mhz 33 <38 <38 <38 v inv integrated noise 5mhz to 150mhz 33 <38 <38 <38 v inv static, dc performance * input offset voltage 3.5 <8.0 <8.0 <11.0 mv vio average temperature coefficient 11 <25 <25 <25 v/ dvio * input bias current non-inverting 3.0 <25 <15 <15 a ibn average temperature coefficient 15 <100 <100 <100 na/ dibn * input bias current inverting 2.0 <22 <10 <25 a ibi average temperature coefficient 20 <150 <150 <150 na/ dibi * power supply rejection ratio 69 >55 >55 >55 db psrr common mode rejection ratio 60 >50 >50 >50 db cmrr * supply current no load 25 <27 <27 <29 ma icc miscellaneous performance non-inverting input resistance dc 3.0 >1.0 >1.0 >1.0 m rin non-inverting input capacitance 70mhz 5.0 <7.0 <7.0 <7.0 pf cin output impedance dc C <0.1 <0.1 <0.1 ro output voltage range no load 12 > 11 > 11 > 11 v vo internal feedback resistor 2.0 C C C k rf absolute tolerance C C <0.2 C % rfa temperature coefficient C C -100 40 C ppm/ rftc inverting input current self limit 2.2 <3.0 <3.0 <3.2 ma icl min/max ratings are based on product characterization and simulation. individual parameters are tested as noted. outgoing quality levels are determined from tested parameters. absolute maximum ratings recommended operating conditions v cc 20v v cc 5v to 15v i o 150ma i o 100ma common mode input voltage, v o |v cc | > 15v (29 - |v cc |)v common mode input voltage (|v cc | -5)v |v cc | 15v (|v cc | -1)v gain range +7 to +50, -1 to -50 differential input voltage 3v note 1: * ai/ak/am/hxc/hxa 100% tested at +25 thermal resistance (see thermal model) = ak/am/hxc/hxa 100% tested at +25c and sample junction temperature +175 tested at -55 and +125? operating temperature ai: -25 to +85? = ai sample tested at +25 ak/am/hxc/hxa: -55 to +125? note 2: settling time specifications require the use of an external storage temperature -65 to +150? feedback resistor (2k ). lead temperature (soldering 10s) +300 kh207 electrical characteristics (a v = +20v, v cc = ?5v, r l = 200 , r f = 2k ; unless specified)
kh207 data sheet rev. 1a january 2004 3 kh207 typical performance characteristics (t a = +25, a v = +20, v cc = ?5v, r f = 20 ,r l = 200 ; unless specified) non-inverting frequency response n o r m a l i z e d m a g n i t u d e ( 1 d b / d i v ) p h a s e ( 4 5 / d i v ) frequency (mhz) 2 0 20 40 60 80 100 120 140 160 180 200 gain phase a v = +7 a v = +20 a v = +50 a v = +7 a v = +20 a v = +50 inverting frequency response n o r m a l i z e d m a g n i t u d e ( 1 d b / d i v ) p h a s e ( 4 5 / d i v ) frequency (mhz) 2 0 20 40 60 80 100 120 140 160 180 200 gain phase a v = -1 a v = -7 a v = -1 a v = -7 a v = -20 a v = -50 a v = -20 a v = -50 frequency response vs. external r f r e l a t i v e g a i n ( 5 d b / d i v ) frequency (mhz) 2 0 20 40 60 80 100 120 140 160 180 200 r f = 1.5k a v = +7 a v = +50 a v = +20 r f = 2k r f = 3k r f = 1.5k r f = 2k r f = 3k r f = 1.5k r f = 2k r f = 3k large signal gain and phase m a g n i t u d e ( 1 d b / d i v ) p h a s e ( 4 5 / d i v ) frequency (mhz) 2 0 15 30 45 60 75 90 105 120 135 150 v o = 10v pp gain phase relative bandwidth vs. v cc r e l a t i v e b a n d w i d t h v cc (v) 2 4 6 8 10 12 14 16 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 gain and phase for various loads m a g n i t u d e ( 1 d b / d i v ) p h a s e ( 4 5 / d i v ) frequency (mhz) 2 0 20 40 60 80 100 120 140 160 180 200 r l = 50 r l = 100 r l = 200 r l = 1k r l = 1k r l = 200 r l = 100 r l = 50 gain phase small signal pulse response o u t p u t v o l t a g e ( 0 . 4 v / d i v ) time (5ns/div) 2 a v = +20 a v = -20 large signal pulse response o u t p u t v o l t a g e ( 2 v / d i v ) time (5ns/div) 2 a v = +20 a v = -20 settling time s e t t l i n g e r r o r ( % ) time (5ns/div) 2 10v step r f = 2k (external) -0.20 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 2nd and 3rd harmonic distortion d i s t o r t i o n ( d b c ) frequency (mhz) k -40 -75 -70 -65 -60 -55 -50 -45 -90 1 10 100 -80 -85 2nd 3rd 2nd harmonic distortion, r l = 100 d i s t o r t i o n ( d b c ) frequency (mhz) k -20 -70 -60 -50 -40 -30 -90 1 10 100 -80 8v pp 16v pp 4v pp 2v pp 1v pp 3rd harmonic distortion, r l = 100 d i s t o r t i o n ( d b c ) frequency (mhz) k -20 -70 -60 -50 -40 -30 -90 1 10 100 -80 8v pp 16v pp 4v pp 2v pp 1v pp equivalent input noise n o i s e v o l t a g e ( n v h z ) frequency (hz) k 100 10 1 n o i s e c u r r e n t ( p a h z ) 100 10 1 10 2 10 3 10 4 10 5 10 6 10 7 10 8 inverting current 20pa hz non-inverting current 2.2pa hz voltage 1.6nv/ hz 2-tone, 3rd order intermod. intercept i n t e r d e p t p o i n t ( d b m ) frequency (mhz) k 45 40 35 30 25 20 15 0 10 20 30 40 50 60 70 80 90 100 50 50 p out cmrr and psrr p s r r a n d c m r r ( d b ) frequency (hz) 2 0 20 40 60 80 100 100 1k 100m 1 0k 100k 1m 10m psrr cmrr
data sheet kh207 4 rev. 1a january 2004 current feedback amplifiers some of the key features of current feedback technology are: n independence of ac bandwidth and voltage gain n adjustable frequency response with feedback resistor n high slew rate n fast settling current feedback operation can be described using a simple equation. the voltage gain for a non-inverting or inverting current feedback amplifier is approximated by equation 1. equation 1 where: n a v is the closed loop dc voltage gain n r f is the feedback resistor n z(j ) is the clc205s open loop transimpedance gain n is the loop gain the denominator of equation 1 is approximately equal to 1 at low frequencies. near the -3db corner frequency, the interaction between r f and z(j ) dominates the circuit performance. the value of the feedback resistor has a large affect on the circuits performance. increasing r f has the following affects: n decreases loop gain n decreases bandwidth n reduces gain peaking n lowers pulse response overshoot n affects frequency response phase linearity overdrive protection unlike most other high-speed op amps, the kh207 is not damaged by saturation caused by overdriving input signals (where v in x gain > max. v o ). the kh207 self limits the current at the inverting input when the output issaturated (see the inverting input current self limit specification); this ensures that the amplifier will not be damaged due to excessive internal currents during overdrive. for protection against input signals which would exceed either the maximum differential or common mode input voltage, the diode clamp circuits below may be used. figure 1: diode clamp circuits for common mode and differential mode protection short circuit protection damage caused by short circuits at the output may be prevented by limiting the output current to safe levels.the most simple current limit circuit calls for placing resistors between the output stage collector supplies and the output stage collectors (pins 12 and 10). the value of this resistor is determined by: where i i is the desired limit current and r i is the minimum expected load resistance (0 for a short to ground). bypass capacitors of 0.01 f on should be used on the collectors as in figures 2 and 3. figure 2: recommended non-inverting gain circuit figure 3: recommended inverting gain circuit a more sophisticated current limit circuit which provides a limit current independent of r i is shown in figure 4 on page 5. with the component values indicated, current limiting occurs at 50ma. for other values of current limit (i i ), select r c to equal v be /l i . where v be is the base to emitter voltage drop of q3 (or q4) at a current of [2v cc C 1.4] / r x , where r x [(2v cc C1.4) / i i ] b min . also, b min is the minimum beta of q1 (or q2) at a current of i i . since the limit current depends on v be , which is temperature dependent, the limit current is likewise temperature dependent. differential protection kh207 + - common mode
protection r g +v cc v in k v o -v cc r v i r c c i i =? 33 +15v .1 3.9 .01 capactance in f 1 12 8 3,7 200 10 11 33 .01 .1 3.9 -15v 9 + - kh207 v o r f = 2000 (internal) 6 v in 5 r i 50 r g a1 r r v f g =+ 33 +15v .1 3.9 .01 capactance in f 1 12 8 5 v in 3,7 200 10 r i 11 33 .01 .1 3.9 -15v 9 + - kh207 v o r f = 2000 (internal) 6 50 r g for z in = 50 , select r g ||r i = 50 a -r r v f g = v v a 1 r zj o in v f = + () zj r f ()
kh207 data sheet rev. 1a january 2004 5 figure 4: active current limit circuit (50ma) controlling bandwidth and passband response in most applications, a feedback resistor value of 2k will provide optimum performance; nonetheless, some applications may require a resistor of some other value.the response versus r f plot on the previous page shows how decreasing r f will increase bandwidth (and frequency response peaking, which may lead to instability). conversely, large values of feedback resistance tend to roll off the response. the best settling time performance requires the use of an external feedback resistor (use of the internal resistor results in a 0.1% to 0.2% settling tail). the settling performance may be improved slightly by adding a capacitance of 0.4pf in parallel with the feedback resistor (settling time specifications reflect performance with an external feedback resistor but with no external capacitance). thermal model noise analysis approximate noise figure can be determined for the kh207 using the equivalent input noise plot on page 3 and the equations shown below. kt = 4.00 x 10 -21 joules at 290 v n is spot noise voltage (v/ hz) i n is non-inverting spot noise current (a/ hz) i i is inverting spot noise current (a/ hz) figure 5: noise figure diagram and equations (noise figure is for the network inside this box.) driving cables and capacitive loads when driving cables, double termination is used to prevent reflections. for capacitive load applications, asmall series resistor at the output of the kh207 will improve stability and settling performance. transmission line matching one method for matching the characteristic impedance (z o ) of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. figure 6 shows typical inverting and non-inverting circuit configurations for matching transmission lines. figure 6: transmission line matching non-inverting gain applications: n connect r g directly to ground. n make r 1 , r 2 , r 6 , and r 7 equal to z o . n use r 3 to isolate the amplifier from reactive loading caused by the transmission line, or by parasitics. r s r n r o r f r g kh207 + - f r r r kt i v r ri ra where r rr rr a r r s n s n n p f i pv p sn sn v f g =++?++ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? = + =+ 10 1 4 1 2 2 2 22 22 log ; q3
(2n3906) r x 14.3k q4
(2n3904) 0.01f 0.01f +v cc r c 12 q1
(mje170) q2
(mje180) r c 12 -v cc to pin 10 to pin 12 k p circuit = [(+v cc ) C(-- cc )] 2 / 1.77k p xxx = [( v cc ) Cv out Ci col ) (r col + 6)] (i col ) (% duty cycle) (for positive v o and v cc , this is the power in the npn output stage.) (for negative v o and v cc , this is the power in the pnp output stage.) ca = 65/w in still air without a heatsink. 35/w in still air without a thermalloy 2268. 15/w in 300ft/min air with a thermalloy 2268 (thermalloy 2240 works equally well.) i col = v out /r load or 3ma, whichever is greater. (include feedback r in r load .) r col is a resistor (33 recommended) between the xxx collector and v cc . t j (pnp) = p pnp (100 + ca ) + (p cir + p npn ) ca + t a , similar for t j (npn) . t j (cir) = p cir (17.5 + ca ) + (p pnp + p npn ) ca + t a . + - t ambient ca t case 17.5 c/w t j(circuit) p circuit 100 c/w t j(npn) p npn 100c/w p pnp t j(pnp) kh207 + - r 3 z 0 r 6 v o z 0 r 1 r 2 + - r g z 0 r 4 r 5 v 1 v 2 + - r f c 6 r 7
data sheet kh207 6 rev. 1a january 2004 inverting gain applications: n connect r 3 directly to ground. n make the resistors r 4 , r 6 , and r 7 equal to z o . n make r 5 ii r g = z o . the input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed.use c 6 to match the output transmission line over a greater frequency range. c 6 compensates for the increase of the amplifiers output impedance with frequency. dynamic range (intermods) for rf applications, the kh207 specifies a third order intercept of 26dbm at 60mhz and p o = 10dbm. a 2-tone, 3rd order imd intercept plot is found in the typical performance characteristics section. the out- put power level is taken at the load. third-order harmon- ic distortion is calculated with the formula: hd 3 rd = 2 ? (ip3 o Cp o ) where: n ip3 o = third-order output intercept, dbm at the load. n p o = output power level, dbm at the load. n hd 3 rd = third-order distortion from the fundamental, -dbc. n dbm is the power in mw, at the load, expressed in db. realized third-order output distortion is highly dependent upon the external circuit. some of the common external circuit choices that improve 3 rd order distortion are: n short and equal return paths from the load to the supplies. n de-coupling capacitors of the correct value. n higher load resistance. n a lower ratio of the output swing to the power supply voltage. printed circuit layout as with any high frequency device, a good pcb layout will enhance the performance of the kh207. goodground plane construction and power supply bypassing close to the package are critical to achieving full perfor-mance. in the non-inverting configuration, the amplifier is sensitive to stray capacitance to ground at the inverting input. hence, the inverting node connections should be small with minimal stray capacitance to the ground plane or other nodes. shunt capacitance across the feedback resistor should not be used to compensate for this effect. general layout and supply bypassing play major roles in high frequency performance. follow the steps below asa basis for high frequency layout: n include 6.8 f tantalum and 0.1 f ceramic capacitors on both supplies. n place the 6.8 f capacitors within 0.75 inches of the power pins. n place the 0.1 f capacitors less than 0.1 inches from the power pins. n remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance. n minimize all trace lengths to reduce series inductances. n use flush-mount printed circuit board pins for prototyping, never use high profile dipsockets. an evaluation pc board (part number 730009) for the kh207 is available to aid in device testing.
kh207 package dimensions data sheet kh207 symbol inches milimeters
minimun maximum minimum maximum
a 0.142 0 .181 3. 61 4 .60
b 0.016 0.019 0.41 0.48
d 0.595 0.605 15.11 15.37
d 1 0.543 0.555 13.79 14.10
e 0.400 bsc 10.16 bsc
e 1 0.200 bsc 5.08 bsc
e 2 0.100 bsc 2.54 bsc
f 0.016 0.030 0.41 0.76
k 0.026 0.036 0.66 0.91 k 1 0.026 0.036 0.66 0.91
l 0.310 0.340 7.87 8.64
45 bsc 45 bsc notes:
seal: cap weld
lead finish: gold per mil-m-38510
package composition:
package: metal
lid: type a per mil-m-38510 8 7 9 2 3 1 5 6 4 11 10 12 k 1 e dd 1 to-8
e 1 e 2 k l a f b life support policy cadekas products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of cadeka microcircuits, inc. as used herein: 1. life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. cadeka does not assume any responsibility for use of any circuitry described, and cadeka reserves the right at any time without notice to change said circuitry and specifications. www.cadeka.com ?2004 cadeka microcircuits, llc
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